Even so, there were many games and applications that run in the minimalistic 1 K, including a basic game of Chess. It was not that hard to get to know, understand, and control the computer completely, something almost impossible today.
There were also an RS-232 serial interface (at ~$140) and a Centronics parallel interface (at ~$105) that would allow the ZX81 to communicate to a standard printer, as well as a full-sized external keyboard (at ~$85).
DK'tronics sold a case and keyboard which, with considerable skill, could be used to replace the membrane keyboard and black "doorstop" case.
In the ZX80 and ZX81, the video output was generated by the Z80 chip. In the ZX80, when a program ran the screen blanked until the program paused again for input. An improvement of the ZX81 over the ZX80 was that the ZX81 had two modes of operation. The ZX81 could run in FAST mode like the ZX80, blanking while programs ran, or in SLOW mode (approximately 1/4 as fast) in which the video was maintained since programs ran only while the TV's electron gun moved from the bottom to the screen back to the top. Since a FOR-NEXT loop from 1 to 1000 took 19 seconds, it was common to run the machine in FAST all the time, even when editing a program, causing the TV to flash every time a key was pressed into the editor.
Another trait of the ZX81 was that it echoed the signal from the tape recorder to the screen whilst loading and saving programs using cassettes, causing the TV to display zigzagging patterns.
The ZX81 did not have the ability to make sound, but by clever coding it was possible to modulate the interference that the processor caused on the TV and create a VERY simple musical keyboard.
The ZX81 did not use ASCII but had its own character set. Character code 0 was space, codes 1-10 were used for blocky graphics, codes 11-63 corresponded to punctuation, numbers and upper case characters. Character codes 128-191 were reverse video versions of the first 64 characters. Other codes represented BASIC keywords and control codes such as NEWLINE. There were no lower case characters.
Because the display was generated primarily by software in the ZX81 ROM, it was possible to override the interrupt service routine and generate the display oneself. Several "hi-res" (meaning, 256x192, rather than 64x48) games did this, notably from a company called Software Farm.
There was a notorious bug causing some ZX81s to give the square root of 0.25 as 1.3591409 rather than 0.5. Sinclair's reputation for poor quality control was due less to the existence of the bug in some machines, and more to the time it took to react once the bug had been reported. Conversely, an article in BYTE of the time, comparing mathematical accuracy of several mainstream and much more expensive computers of the time, reflected positively on the ZX81.
The ZX81 sold in large numbers, until it was replaced by its greatly upgraded successor, the ZX Spectrum.
The Sinclair ZX81 was sold in the U.S. by Sinclair itself (from its facility in Nashua, New Hampshire) and also by Timex as the Timex-Sinclair TS1000. The TS1000 shipped with twice as much RAM (2 KB!).
ZX81 video technical operation
The technical means used to implement the display, while clever, was rather thoroughly non-standard. The system operated as follows:
The ZX81 contains (depending on RAM type) four chips; a RAM, a ROM, a CPU and an ASIC (called a ULA - Uncommitted Logic Array). A series of resistors were placed in series with the data lines; the CPU and ROM were on one side of the data resistors, the RAM on the other. Addresses 0-8191 were allocated for ROM (the last half-kilobyte contained the bitmap images for the character set) and 16384-32767 were allocated for RAM.
The display was interrupt-driven in such a way that normal processing could continue during or near the vertical blanking interval; interrupts would then pass control to the video routines during the remainder of the available time. The CPU itself was then used as a counter to control the output of video data from memory to the TV screen.
The processor would attempt to jump to an address of (32768 + the beginning of the video data) in RAM. Address line A15 and an otherwise rarely-used Z80 control line which indicated "memory (instruction cycle) 1" would become simultaneously active; the ULA would detect this as an attempt to execute from video memory and would latch the retrieved RAM data from the data bus. It would then check data bit 6; if zero, it would force a NOP (no-operation) instruction (all zeroes on a Z80) onto the bus. The CPU would continue to execute video RAM as if it were Z80 machine code until it hit a byte with bit6 = 1; this wouldn't be zeroed out by the ULA and would be executed normally.
The ZX81 used its own non-standard character set in which 0-63 were printable characters and 128-191 were the same characters in reverse video. The only valid byte with bit6 = 1 which could be written to video memory was 118, the HALT instruction. This was used as the NEWLINE character. (Placing any other byte with bit6 = 1 (except HALT) into a ZX81's video "display file" RAM would cause the machine crash almost instantly.) A non-maskable interrupt would then be used to bring the processor out of the HALT state once it was time to display the next raster line.
The conversion of the characters into pixels for display was also based on exploitation of Z80-specific processor capabilities. The Z80 contained a register, R, which was normally intended to be a dynamic RAM refresh counter. During a cycle in which data was not being retrieved, the RFSH control signal would be active and the R counter's contents would be output to the lower portion of the address bus. An undocumented Z80 feature had the otherwise-unused interrupt vector register, I, on the upper portion of the address bus during this refresh cycle.
The ZX81 had the bitmaps of the character set at the end of its 8K BASIC ROM; the ROM was wired to the opposite side of address bus series resistors so that certain address bits could be overridden under ULA control. The I register would be loaded to point to the base of the character set bitmap table in ROM and the R (refresh) counter could be used to count which line in the 8x8-bit bitmap for a character was to be displayed.
The BASIC interpreter itself was fully proprietary, unlike most microcomputers of this era (except the Apple) which used a series of similar but incompatible Microsoft BASIC variants. This meant that there was no need to comply with ASCII or any other existing standards.
Even the simplest Z80 instruction takes four cycles to execute. During the first cycle, the processor would attempt to execute video text as data; the ULA would latch the data and force all-zeroes (the NOP or no-operation instruction) onto the bus. During the third cycle, the processor would attempt a dynamic RAM refresh cycle. The ULA would use this refresh cycle to substitute bits 0-5 of the stored character in place of address A3-8 of the address. The high bits would be coming from the otherwise-unused interrupt vector register (which is pointing to the character set in ROM), the low three bits would indicate which row of the individual character was currently being scanned. Data bit 7 from the original character byte would be used internally by the ULA to control inverse-video on a per-character basis. In this manner, a byte of display pixels would be forced onto the bus where it could then be fed into a shift register driven by the same crystal used to generate the CPU clock and from there be sent to the TV set.
The video sync would be generated using the same individual I/O bit used to generate the output for the 250 bit/s cassette recorder interface.
Unfortunately, the use of the CPU to generate the video display would slow all other processing by 75% if the display was enabled.
The I/O itself also used some undocumented Z80 features. Nominally, a Z80 I/O port address is eight bits. If a 8-bit register is used as the address (such as IN A,[L]) what actually went out onto the 16-bit Z80 address bus was not L but HL, a 16-bit pair with L as the lower eight bits. The ZX81 exploited this by using the upper eight bits of the address bus to drive the scan lines for the 8x5 keyboard matrix. The returned bits could then be read by a single input port.
The lower eight I/O address bits were used as individual chip selects for individual I/O devices within the ULA. Every lower address bit except that selecting the desired device would therefore have to be one, theoretically allowing up to eight I/O devices. In the standard configuration, the only I/O present (unless the optional external thermal printer was plugged into the 40-pin bus edge connector) was one bit for the cassette input, one bit for the cassette/video sync output, a five-bit word of input from the keyboard (a dreadful 40 key device which resembled a car bumper sticker more than it resembled a proper keypad) and whatever control registers were required to enable the ULA itself for video generation. This meant that not all eight bits were used, allowing some limited room for external expansion.
RAM was originally limited to 2K (internal, Timex versions installed the full 2 Kx8 RAM as one chip, other Sinclair ZX81s had one 1 Kx8 or two 1 Kx4 static RAMs) or 16K (external, a RAMCS line on the 40 pin edge connector being tied to a constant level in the RAMpack to disable the internal RAM) because of the use of M1 + A15 to indicate retrieval of video character bytes.
The external RAMpack used eight 4116 chips (a primitive 16 K x 1 bit dynamic RAM in a 16-pin DIP with 1 data pin, 7 multiplexed address pins, /RAS, /CAS, /WE and power). These old chips required +12 V, +5 V and -5 V while the ZX81's internal power supply was merely a 7805 chip (a 5V linear regulator attached to a small metal heatsink which became rather warm as the ZX81 was powered from a 9 V adapter through a 1/8 in (3 mm) phone jack). The RAMpack contained an oscillator and some inductors to invert +5 V to the other required voltages as well as circuitry to multiplex the address lines, adding significantly to its internal complexity.
Unfortunately the 40 pin bus edge connector itself was not gold-plated (the contacts were covered with plain solder) and was very prone to bad connections and oxidation which rendered the upgraded ZX81 system very mechanically fragile and crash-prone. This would become annoying as it would take eight minutes to reload the full 16Kbyte RAM from an (often-unreliable) cassette tape. Home-brew "kludge" solutions to this problem varied from physically bolting the computer and RAMpack to a solid substrate to placing the whole works in a larger case with a proper surplus keyboard in place of the original.
Another less-common upgrade made by some end-users was to connect static RAM (as "pseudo-ROM")in place of the ROM mirrored at addresses 8192-16383. This RAM would need to be connected to the same side of the data bus resistors as the ROM itself so that it could be used to store a user-defined character set of up to 64 characters. One variant on this theme added a one-bit latch to latch the high data bit of the original character (when M1 and A15 were both active) in order to use it to drive one of the address bits, allowing all 128 character bitmaps to be redefined.
As the main RAM was on the wrong side of the data and address bus resistors for this to work, the extra static RAM was required for this approach. Loading the I register to point to the main RAM would not produce the desired result, instead displaying garbage as pixels.
This article is derived from http://en.wikipedia.org/wiki/Sinclair_ZX81